Threshold voltage based CMOS voltage reference - Circuits, Devices and Systems, IEE Proceedings [see also IEE Proceedings G- Circuits, Devices and

The paper describes a CMOS voltage reference design that uses the temperature dependence of NMOS and PMOS threshold voltages to form a temperature-insensitive reference. No diodes or parasitic bipolar transistors are used. The circuit architecture accommodates a wide range of output voltages. A test chip is fabricated using a 0.5mm CMOS process. The prototype achieves a temperature coefficient of 32ppm/1C for a temperature range of 101C to 801C and a supply voltage sensitivity of 10mV/V.